Brief Specification of KEROSTM


The KEROS is a family of high performance secure memory device providing 2K Bytes of user memory with advanced built-in AES 256 security engine and cryptographic features. The memory is divided into 8 user zones each of which can be individually set with different security access right or used together to provide space for one or multiple data files. A configuration zone contains registers to define the security right for each user zone and space for password and the AES256 secret keys used by security logic of ChipsBrain Global Security IC.

Through dynamic, symmetric mutual authentication, data encryption and the use of data decryption provides a secure place for storage of sensitive information within a system. With its protection circuit, this information remains safely even under attack.

The KEROS also provides high security, low cost and easy implementation of host-client type systems without the needs for a MCU operating system. The embedded AES256 cryptographic engine provides for a dynamic, symmetric mutual authentication between the device and host, as well as performs encryption for all data and passwords exchanged between the device and host. The AES256 unique key set may be used for these operations.

Key Features

[Booting Sequence]

High security features

2K Bytes secure EEPROM user memory

Embedded application features

Application Circuit

The following figures describes pin location, reference circuit around KEROS and how to configure the connection with Host MCU.

[Reference for SOT23-6 package type]


[Reference for 8-SOP package type]


[Reference for TDFN-8 package type]